专利名称:Method of making transistor with strained
source/drain
发明人:Yun-Hsiu Chen,Syun-Ming Jang申请号:US100599申请日:20040714公开号:US071152B2公开日:20061010
专利附图:
摘要:A method of fabricating a transistor comprises the steps of: forming a gateelectrode above a substrate made of a first semiconductor material having a first latticespacing, forming recesses in the semiconductor substrate at respective locations where a
source region and a drain region are to be formed, epitaxially growing a secondsemiconductor material having a second lattice spacing different from the first latticespacing in the recesses, and implanting a dopant in the second semiconductor materialafter the growing step.
申请人:Yun-Hsiu Chen,Syun-Ming Jang
地址:Hsin-Chu TW,Hsin-Chu TW
国籍:TW,TW
代理机构:Duane Morris LLP
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