专利名称：Method and Apparatus for Adaptive Voltage
Scaling Based on Instruction Usage
发明人：Richard Gerard Hofmann,Jeffrey Todd
Bridges
申请号：US11828782申请日：20070726
公开号：US20090031155A1公开日：20090129
专利附图：
摘要：Different software applications may use a set of instructions having criticaltiming paths less than a worst case critical timing path of a processor complex. For such
applications, a supply voltage may be reduced while still maintaining the clock frequencynecessary to meet the application's performance requirements. In order to reduce thesupply voltage, an adaptive voltage scaling method is used. A critical path is selectedfrom a plurality of critical paths for analysis on emulation logic to determine an attributeof the selected critical path during on chip functional operations. The selected criticalpath is representative of the worst case critical path to be in operation during a programexecution. During on-chip functional operations, a voltage is controlled in response to theattribute, wherein the voltage supplies power to a power domain associated with theplurality of critical paths. The reduction in voltage reduces power drain based oninstruction set usage allowing battery life to be extended.
申请人：Richard Gerard Hofmann,Jeffrey Todd Bridges
地址：Cary NC US,Raleigh NC US
国籍：US,US
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