FPAL15SH60资料

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FPAL15SH60FPAL15SH60Smart Power Module (SPM)General DescriptionFPAL15SH60 is an advanced smart power module (SPM)that Fairchild has newly developed and designed to providevery compact and low cost, yet high performance ac motordrives mainly targeting high speed low-power inverter-driven application like washing machines. It combinesoptimized circuit protection and drive matched to low-lossIGBTs. Highly effective short-circuit current detection/protection is realized through the use of advanced currentsensing IGBT chips that allow continuous monitoring of theIGBTs current. System reliability is further enhanced by thebuilt-in over-temperature and integrated under-voltagelock-out protection. The high speed built-in HVIC providesopto-coupler-less IGBT gate driving capability that furtherreduce the overall size of the inverter system design. Inaddition the incorporated HVIC facilitates the use of single-supply drive topology enabling the FPAL15SH60 to bedriven by only one drive supply voltage without negativebias.Features•UL Certified No. E209204•600V-15A 3-phase IGBT inverter bridge including controlICs for gate driving and protection •Single-grounded power supply due to built-in HVIC•Typical switching frequency of 15kHz•Built-in thermistor for over-temperature monitoring•Inverter power rating of 0.75kW / 100~253 Vac•Isolation rating of 2500Vrms/min.•Very low leakage current due to using ceramic substrate•Adjustable current protection level by varying seriesresistor value with sense-IGBTsApplications•AC 100V ~ 253V three-phase inverter drive for smallpower (0.75kW) ac motor drives•Home appliances applications requiring high switchingfrequency operation like washing machines drive system•Application ratings: - Power : 0.75 kW / 100~253 Vac - Switching frequency : Typical 15kHz (PWM Control) - 100% load current : 5.0A (Irms) - 150% load current : 7.5A (Irms) for 1 minute External View and Marking InformationTop ViewBottom View57 mm55 mmMarkingDevice NameVersion, Lot CodeFig. 1.©2002 Fairchild Semiconductor Corporation

Rev. C3, February 2002

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FPAL15SH60Integrated Power Functions

•600V-15A IGBT inverter for three-phase DC/AC power conversion (Please refer to Fig. 3)

Integrated Drive, Protection and System Control Functions

•For inverter high-side IGBTs: Gate drive circuit, High voltage isolated high-speed level shifting

Control circuit under-voltage (UV) protection

Note) Available bootstrap circuit example is given in Figs. 11, 16 and 17.

•For inverter low-side IGBTs: Gate drive circuit, Short circuit protection (SC)

Control supply circuit under-voltage (UV) protection

•Temperature Monitoring: System over-temperature monitoring using built-in thermistor

Note) Available temperature monitoring circuit is given in Fig. 17.

•Fault signaling: Corresponding to a SC fault (Low-side IGBTs) or a UV fault (Low-side supply)•Input interface: 5V CMOS/LSTTL compatible, Schmitt trigger input

Pin Configuration

Top View

VS(U)VB(U)

VCC(L)COM(L)IN(UL)IN(VL)IN(WL)VFOCFODCSC

RSCNCVTHRTH

VCC(UH)IN(UH)

VS(V)VB(V)VCC(VH)IN(VH)COM(H)VS(W)VB(W)VCC(WH)IN(WH)

WVUNP

Fig. 2.

Pin Descriptions

Pin Number

234567101112131415

Pin NameVCC(L)COM(L)IN(UL)IN(VL)IN(WL)VFOCFODCSCRSC NCVTHRTHWVU

Pin Description

Low-side Common Bias Voltage for IC and IGBTs Driving Low-side Common Supply Ground Signal Input Terminal for Low-side U Phase Signal Input Terminal for Low-side V Phase Signal Input Terminal for Low-side W Phase Fault Output Terminal

Capacitor for Fault Output Duration Time Selection

Capacitor (Low-pass Filter) for Short-current Detection Input Resistor for Short-circuit Current DetectionNO Connection

Thermistor Bias Voltage

Series Resistor for the Use of Thermistor (Temperature Detection)Output Terminal for W Phase Output Terminal for V Phase Output Terminal for U Phase

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FPAL15SH60Pin Descriptions (Continued)Pin Number161718192021222324252627282930Pin NameNPIN(WH)VCC(WH)VB(W)VS(W)COM(H)IN(VH)VCC(VH)VB(V)VS(V)IN(UH)VCC(UH)VB(U)VS(U)Pin DescriptionNegative DC–Link Input Positive DC–Link Input Signal Input Terminal for High-side W Phase High-side Bias Voltage for W Phase IC High-side Bias Voltage for W Phase IGBT Driving High-side Bias Voltage Ground for W Phase IGBT Driving High-side Common Supply Ground Signal Input Terminal for High-side V Phase High-side Bias Voltage for V Phase IC High-side Bias Voltage for V Phase IGBT Driving High-side Bias Voltage Ground for V Phase IGBT Driving Signal Input Terminal for High-side U Phase High-side Bias Voltage for U Phase IC High-side Bias Voltage for U Phase IGBT Driving High-side Bias Voltage Ground for U Phase IGBT Driving Internal Equivalent Circuit and Input/Output Pins(29) VB(U)VB(1) VCC(L)(2) COM(L)(3) IN(UL)(4) IN(VL)(5) IN(WL)(6) VFOVCCCOM(L)IN(UL)IN(VL)IN(WL)V(FO)Wout(7) CFOD(8) CSC(9) RSC(10) NC(11) VTH(12) RTHTHERMISTORC(FOD)C(SC)VBHOVccINVoutUoutHOVccIN(28) VCC(UH)(27) IN(UH)VSCOM(30) VS(U)(25) VB(V)VBHOVccIN(24) VCC(VH)(23) IN(VH)(22) COM(H)(26) VS(V)(20) VB(W)(19) VCC(WH)(18) IN(WH)VSCOMVSCOM(21) VS(W)W(13)V(14)U(15)N(16)P(17)Note1.Inverter low-side ( (1) – (12) pins) is composed of three sense-IGBTs including freewheeling diodes for each IGBT and one control IC which has gate driving,current sensing and protection functions. 2.Inverter power side ( (13) – (17) pins) is composed of two inverter dc-link input terminals and three inverter output terminals.3.Inverter high-side ( (18) – (30) pins) is composed of three normal-IGBTs including freewheeling diodes and three drive ICs for each IGBT.Fig. 3.©2002 Fairchild Semiconductor CorporationRev. C3, February 2002

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FPAL15SH60Absolute Maximum Ratings

Inverter Part (TC = 25°C, Unless Otherwise Specified)

Item

Supply VoltageSupply Voltage (Surge)Collector-emitter VoltageEach IGBT Collector CurrentEach IGBT Collector Current (Peak)Collector Dissipation

Operating Junction Temperature

SymbolVDCVPN(Surge)VCES± IC± ICPPCTJ

TC = 25°C (Note Fig. 4)TC = 25°C (Note Fig. 4)TC = 25°C per One Chip(Note 1)

Condition

Applied to DC - LinkApplied between P- N

Rating450500600153047-55 ~ 150

UnitVVVAAW°C

Note

1.It would be recommended that the average junction temperature should be limited to TJ ≤ 125°C (@TC ≤ 100°C) in order to guarantee safe operation.

Control Part (TC = 25°C, Unless Otherwise Specified)

Item

Control Supply Voltage

SymbolCondition

Applied between VCC(H) - COM(H), VCC(L) - COM(L)VCC

High-side Control Bias VoltageVBSApplied between VB(U) - VS(U), VB(V) - VS(V), VB(W) -

VS(W)Input Signal VoltageFault Output Supply VoltageFault Output Current

Current Sensing Input Voltage

VINVFOIFOVSC

Applied between IN(UH), IN(VH), IN(WH) - COM(H) IN(UL), IN(VL), IN(WL) - COM(L)Applied between VFO - COM(L)Sink Current at VFO PinApplied between CSC - COM(L)

Rating1820-0.3 ~ 6.0-0.3~VCC+0.5

5-0.3~VCC+0.5

UnitVVVVmAV

Total System

Item

Self Protection Supply Voltage Limit (Short Circuit Protection Capability)Module Case Operation TemperatureStorage TemperatureIsolation Voltage

SymbolCondition RatingVPN(PROT)Applied to DC - Link,400

VCC = VBS = 13.5 ~ 16.5V

TJ = 125°C, Non-repetitive, less than 6µs

TCTSTGVISO

60Hz, Sinusoidal, AC 1 minute, Connection Pins to Heat-sink PlateNote Fig. 4

-20 ~ 100-55 ~ 1502500

UnitV

°C°CVrms

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FPAL15SH60Case Temperature (TC) Detecting Point

VS(U)VB(U)

VCC(L)COMIN(UL)IN(VL)IN(WL)VFOCFODCSCRSCNCVTHRTH

VCC(UH)IN(UH)

VS(V)VB(V)VCC(VH)IN(VH)COMVS(W)VB(W)VCC(WH)IN(WH)

CeramicSubstate

WVUNP

Fig. 4. Tc Measurement Point

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FPAL15SH60Absolute Maximum Ratings

Thermal Resistance

Item

Junction to Case Thermal Resistance

SymbolCondition Min.Typ.

--Rth(j-c)QEach IGBT under Inverter Operating Condition

(Note 2)Rth(j-c)F

Contact Thermal Resistance

Rth(c-f)

Each FWDi under Inverter Operating Condition (Note 2)

Ceramic Substrate (per 1 Module)Thermal Grease Applied

----Max.2.613.730.06

Unit°C/W°C/W°C/W

Note

2.For the measurement point of case temperature (Tc), please refer to Fig. 4.

Electrical Characteristics

Inverter Part (Tj = 25°C, Unless Otherwise Specified)

Item

Collector - emitter Saturation VoltageFWDi Forward VoltageSwitching Times

Symbol

VCE(SAT)VCC = VBS = 15V

VIN = 0VVFMtONtC(ON)tOFFtC(OFF)trr

Collector - emitter Leakage Current

ICES

VIN = 5V

Condition Min.-IC = 15A, Tj = 25°C

IC = 15A, Tj = 125°CIC = 15A, Tj = 25°CIC = 15A, Tj = 125°C

VPN = 300V, VCC = VBS = 15VIC = 15A, Tj = 25°C

VIN = 5V ↔ 0V, Inductive Load(High-Low Side)(Note 3)

VCE = VCES, Tj = 25°C

---------Typ.----0.390.120.530.160.1-Max.2.82.92.52.3-----250

UnitVVVVusususususuA

Note

3.tON and tOFF include the propagation delay time of the internal drive IC. tC(ON) and tC(OFF) are the switching time of IGBT itself under the given gate driving conditioninternally. For the detailed information, please see Fig. 5.

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FPAL15SH60trrVCE100% ICICICVCEVINtONVIN(ON)VINtC(ON)90% IC10% IC10% VCEtOFFVIN(OFF)tC(OFF)10% VCE10% IC(a) Turn-on(b) Turn-offFig. 5. Switching Time DefinitionVCE: 100V/div.IC: 5A/div.IC: 5A/div.VCE: 100V/div.time : 100ns/div.time : 100ns/div.(a) Turn-on(b) Turn-offFig. 6. Experimental Results of Switching WaveformsTest Condition: Vdc=300V, Vcc=15V, L=500uH (Inductive Load), TC=25°C©2002 Fairchild Semiconductor CorporationRev. C3, February 2002

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FPAL15SH60Electrical Characteristics

Control Part (Tj = 25°C, Unless Otherwise Specified)

Item

Control Supply VoltageHigh-side Bias VoltageQuiescent VCC Supply Cur-rent

SymbolCondition

Applied between VCC(H),VCC(L) - COMVCCVBSIQCCLIQCCH

Quiescent VBS Supply Cur-rent

Fault Output VoltagePWM Input FrequencyAllowable Input Signal

Blanking Time considering Leg Arm-shortShort Circuit Trip LevelSensing Voltage of IGBT CurrentSupply Circuit Under-Voltage Protection

IQBSVFOHVFOLfPWMtdead

Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) - VS(W)VCC = 15V

IN(UL, VL, WL) = 5VVCC = 15V

IN(UH, VH, WH) = 5VVBS = 15V

IN(UH, VH, WH) = 5V

VCC(L) - COM(L) VCC(U), VCC(V), VCC(W) - COM(H)VB(U) - VS(U), VB(V) -VS(V), VB(W) - VS(W)

Min.13.513.5---4.5--3

Typ.Max.Unit1516.5V15-----15-16.526130420-1.1--VmAuAuAVVkHzus

VSC = 0V, VFO Circuit: 4.7kΩ to 5V Pull-upVSC = 1V, VFO Circuit: 4.7kΩ to 5V Pull-upTC ≤ 100°C, TJ ≤ 125°C-20°C ≤ TC ≤ 100°C

VSC(ref)VSENUVCCDUVCCRUVBSDUVBSR

TJ = 25°, VCC = 15V (Note 4)

-20°C ≤ TC ≤ 100°C, @ RSC = 82 Ω and

IC = 15A (Note Fig. 8)TJ ≤ 125°C

Detection LevelReset LevelDetection LevelReset Level

VCC = 15V, C(sc) = 1VCFOD = 33nF (Note 5)High-SideLow-Side

Applied between IN(UH), IN(VH), IN(WH) - COM(H)

Applied between IN(UL), IN(VL), IN(WL) - COM(L)

0.450.3711.5127.38.61.4-3.0-3.0--

0.510.560.450.561212.59.010.31.8----506.3

12.51310.8122.00.8-0.8---

VVVVVVmsVVVVkΩkΩ

Fault-out Pulse WidthON Threshold VoltageOFF Threshold VoltageON Threshold VoltageOFF Threshold VoltageResistance of Thermistor

tFODVIN(ON)VIN(OFF)VIN(ON)VIN(OFF)RTH

@ TC = 25°C (Note Figs. 4 and 7)@ TC = 80°C (Note Figs. 4 and 7)

Note

4.Short-circuit current protection is functioning only at the low-sides. It would be recommended that the value of the external sensing resistor (RSC) should beselected around 56 Ω in order to make the SC trip-level of about 20A.

Please refer to Fig. 8 which shows the current sensing characteristics according to sensing resistor RSC.

5.The fault-out pulse width tFOD depends on the capacitance value of CFOD according to the following approximate equation : CFOD = 18.3 x 10-6 x tFOD[F]

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FPAL15SH60 R-T Curve706050Resistance [kΩ]4030201002030405060708090100110120130Temperature [℃]Fig. 7. R-T Curve of The Built-in Thermistor 9080SC Trip Current ISC [A]70605040302010102030405060708090Sensing Resistor RSC [Ω]Fig. 8. Relationship between Sensing Resistor and SC Trip Current for Short-Circuit Protection (ISC = 82 × Rating Current(15A) / RSC)©2002 Fairchild Semiconductor Corporation

Rev. C3, February 2002

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FPAL15SH60Mechanical Characteristics and Ratings

Item

Mounting TorqueCeramic FlatnessWeight

Mounting Screw: M3(Note 6 and 7)

Condition

Recommended 10Kg•cmRecommended 0.98N•m(Note Fig. 9)

Limits

Min.80.780-Typ.100.98-56

Max.121.17+100-UnitsKg•cmN•mumg

Fig. 9. Flatness Measurement Position of The Ceramic Substrate

Note

6.Do not make over torque or mounting screws. Much mounting torque may cause ceramic cracks and bolts and Al heat-fin destruction.

7.Avoid one side tightening stress. Fig.10 shows the recommended torque order for mounting screws. Uneven mounting can cause the SPM ceramic substrate tobe damaged.

Fig. 10. Mounting Screws Torque Order (1 → 2 → 3 → 4)

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FPAL15SH60Recommended Operating ConditionsItemSupply VoltageControl Supply VoltageHigh-side Bias VoltageBlanking Time for Preventing Arm-shortPWM Input SignalInput ON Threshold VoltageInput OFF Threshold VoltageSymbolVPNVCCVBStdeadfPWMVIN(ON)VIN(OFF)ConditionApplied between P - NApplied between VCC(H) - COM, VCC(L) - COMApplied between VB(U) - VS(U), VB(V) - VS(V), VB(W) - VS(W)For Each Input SignalTC ≤ 100°C, TJ ≤ 125°CApplied between UIN,VIN, WIN - COMApplied between UIN,VIN, WIN - COMValue Min.-13.513.53-Typ.3001515-150 ~ 0.6 ~ 5.5Max.40016.516.5--UnitVVVuskHzVVICs Internal Structure and Input/Output ConditionsRBS15V LineVCC(UH,VH,WH)DBSCBSCBSCVB(UH,VH,WH)PUVDETECTLEVELSHIFTPULSEFILTER5V LineRPCBP15IN(UH,VH,WH)PULSEGENERATORRRS QCPHCOMVS(UH,VH,WH)HVICVCC(L)LVICUVDETECTBANDGAPREFERENCETIMEDELAYUVLATCH_UPU,V,W5V LineRPRPFIN(UL,VL,WL)UVPROTECTIONPULSEGENERATOR(HYSTERISIS)BUFFERSCPROTECTIONSOFT_OFFCONTROLOUTPUT(UL,VL,WL)VFOCPLCPFCFODFAULT OUTPUTDURATIONSCLATCH_UPTIMEDELAYSCDETECTIONCFODNCSCRFRSCNote1.One LVIC drives three Sense-IGBTs and can do short-circuit current protection also. Three sense emitters are commonly connected to RSC terminal to detectshort-circuit current. Low-side part of the inverter consists of three sense-IGBTs 2.One HVIC drives one normal-IGBT. High-side part of the inverter consists of three normal-IGBTs 3.Each IC has under voltage detection and protection function. 4.The logic input is compatible with standard CMOS or LSTTL outputs. 5.RPCP coupling at each input/output is recommended in order to prevent the gating input/output signals oscillation and it should be as close as possible to eachSPM gating input pin. 6.It would be recommended that the bootstrap diode, DBS, has soft and fast recovery characteristics.Fig. 11.©2002 Fairchild Semiconductor CorporationRev. C3, February 2002

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FPAL15SH60Time Charts of SPMs Protective FunctionInput SignalInternal IGBTGate-Emitter VoltageControl Supply VoltageP3P5UVdetectP1P2UVresetP6Output CurrentFault Output SignalP4P1 : Normal operation - IGBT ON and conducting current P2 : Under voltage detection P3 : IGBT gate interrupt P4 : Fault signal generationP5 : Under voltage resetP6 : Normal operation - IGBT ON and conducting currentFig. 12. Under-Voltage Protection (Low-side) Input SignalInternal IGBTGate-Emitter VoltageControl Supply VoltageVBSP3P5UVdetectP1P2UVresetP6Output CurrentFault Output SignalP4P1 : Normal operation - IGBT ON and conducting currentP2 : Under voltage detectionP3 : IGBT gate interruptP4 : No fault signal P5 : Under voltage resetP6 : Normal operation - IGBT ON and conducting currentFig. 13. Under-Voltage Protection (High-side) ©2002 Fairchild Semiconductor CorporationRev. C3, February 2002

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FPAL15SH60P5Input SignalInternal IGBTGate-Emitter VoltageSC DetectionP6P1P4Output CurrentP2SC Reference Voltage (0.5V)RC Filter DelayP7Sensing VoltageFault Output SignalP3P8P1 : Normal operation - IGBT ON and conducting currentsP2 : Short-circuit current detectionP3 : IGBT gate interrupt / Fault signal generationP4 : IGBT is slowly turned offP5 : IGBT OFF signalP6 : IGBT ON signal - but IGBT cannot be turned on during the fault-output activationP7 : IGBT OFF stateP8 : Fault-output reset and normal operation startFig. 14. Short-circuit Current Protection (Low-side Operation only) 5V-LineFPAL15SH604.7kΩ100Ω100Ω100Ω4.7kΩ4.7kΩIN(UH),IN(VH),IN(WH)IN(UL),IN(VL),IN(WL)VFOCPU1nF1nF0.47nF1.2nFCOMNoteIt would be recommended that by-pass capacitors for the gating input signals, IN(XX) should be placed on the SPM pins and on the both sides of CPU and SPMfor the fault output signal, VFO, as close as possible.Fig. 15. Recommended CPU I/O Interface Circuit ©2002 Fairchild Semiconductor CorporationRev. C3, February 2002

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FPAL15SH6015V-LineOne-leg Diagram of FPAL15SH60P20ΩVccVBHO0.1uF220uFINCOMVSVccInverterOutputOUT1000uF0.1uFINCOMN Fig. 16. Recommended Bootstrap Operation Circuit and Parameters©2002 Fairchild Semiconductor CorporationRev. C3, February 2002

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FPAL15SH60Gating ULGating VLGating WLFaultCBPFCPUGating UHGating VHGating WHRSRSRSRSRSRSRSVB(U) (29)5V line(1) VCC(L)(2) COM(L)(3) IN(UL)(4) IN(VL)(5) IN(WL)IN(WL)(6) VFOV(FO)CPFCPLCPLCPLCFODCSCRF5V lineRSC(7) CFOD(8) CSC(9) RSC(10) NC(11) VTHCSP05CSPC05RTH(12) RTH(13)W(14)V(15)U(16)N(17)PTHERMISTORWoutC(FOD)C(SC)VBHOVccINVCCCOM(L)IN(UL)IN(VL)VoutUoutVB(V) (25)VBHOVccINVCC(VH) (24)IN(VH) (23)COM(H) (22)VS(V) (26)VB(W) (20)VCC(WH) (19)IN(WH) (18)VBHOVccINVCC(UH) (28)IN(UH) (27)DBSRBS5V lineRPCBSCCBSDBSRBSRPRPVSCOMVS(U) (30)RPRPRPRPCPHCPHCPHVSCOMCBSCCBSDBSRBS15V lineVS(W) (21)CBSCCBSCSPC15CSP15VSCOMTemp. MonitoringCDCSM-Vdc+Note1.RPCPL/RPCPH coupling at each SPM input is recommended in order to prevent input signals’ oscillation and it should be as close as possible to each SPM inputpin.2.By virtue of integrating an application specific type HVIC inside the SPM, direct coupling to CPU terminals without any opto-coupler or transformer isolation ispossible.3.VFO output is open collector type. This signal line should be pulled up to the positive side of the 5V power supply with approximately 4.7kΩ resistance. Pleaserefer to Fig. 15.4.CSP15 of around 7 times larger than bootstrap capacitor CBS is recommended.5.VFO output pulse width should be determined by connecting an external capacitor(CFOD) between CFOD(pin7) and COM(L)(pin2). (Example : if CFOD = 5.6 nF,then tFO = 300 µs (typ.)) Please refer to the note 5 for calculation method.6.Each input signal line should be pulled up to the 5V power supply with approximately 4.7kΩ resistance (other RC coupling circuits at each input may be neededdepending on the PWM control scheme used and on the wiring impedance of the system’s printed circuit board). Approximately a 0.22~2nF by-pass capacitorshould be used across each power supply connection terminals. 7.To prevent errors of the protection function, the wiring around RSC, RF and CSC should be as short as possible.8.In the short-circuit protection circuit, please select the RFCSC time constant in the range 3~4 µs. RF should be at least 30 times larger than RSC. (RecommendedExample: RSC = 56 Ω, RF = 3.9kΩ and CSC = 1nF)9.Each capacitor should be mounted as close to the pins of the SPM as possible.10.To prevent surge destruction, the wiring between the smoothing capacitor and the P&N pins should be as short as possible. The use of a high frequency non-inductive capacitor of around 0.1~0.22 uF between the P&N pins is recommended. 11.Relays are used at almost every systems of electrical equipments of home appliances. In these cases, there should be sufficient distance between the CPU andthe relays. It is recommended that the distance be 5cm at leastFig. 17. Application Circuit©2002 Fairchild Semiconductor CorporationRev. C3, February 2002

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PRODUCT STATUS DEFINITIONSDefinition of Terms

Datasheet IdentificationAdvance Information

Product StatusFormative or In DesignFirst Production

Definition

This datasheet contains the design specifications forproduct development. Specifications may change inany manner without notice.

This datasheet contains preliminary data, and

supplementary data will be published at a later date.Fairchild Semiconductor reserves the right to makechanges at any time without notice in order to improvedesign.

This datasheet contains final specifications. FairchildSemiconductor reserves the right to make changes atany time without notice in order to improve design.This datasheet contains specifications on a productthat has been discontinued by Fairchild semiconductor.The datasheet is printed for reference information only.

Preliminary

No Identification NeededFull Production

ObsoleteNot In Production

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