FDS6911Dual N-Channel Logic level PowerTrench®MOSFET March 2006 FDS6911 Dual N-Channel Logic Level PowerTrench® MOSFET 20V, 7.5A, 13mΩ General Description These N-Channel Logic Level MOSFETs are produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required. Features rDS(on) = 13 mΩ @ VGS = 10 V rDS(on) = 17 mΩ @ VGS = 4.5 V Fast switching speed Low gate charge High performance trench technology for extremely low RDS(ON) High power and current handling capability DD2D2D567Q1432Q2D1DD1DSO-8Pin 1SO-8G1S1SG2S2GS81S AoAbsolute Maximum Ratings T=25C unless otherwise noted Symbol Parameter VDSS ID Drain-Source Voltage Drain Current – Continuous VGSS Gate-Source Voltage – Pulsed PD Power Dissipation for Single Operation TJ, TSTG Ratings Units20 ± 20 V V A (Note 1a) 7.5 (Note 1a) 1.6 W (Note 1b) (Note 1c) 20 1.0 0.9 –55 to +150 °C Operating and Storage Junction Temperature Range Thermal Characteristics RθJA RθJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 78 40 °C/W °C/W Package Marking and Ordering Information Device Marking FDS6911 Device FDS6911 Reel Size 13’’ Tape width 12mm Quantity 2500 units ©2006 Fairchild Semiconductor Corporation FDS6911 Rev A(W)
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FDS6911Dual N-Channel Logic level PowerTrench®MOSFET Electrical Characteristics Off Characteristics BVDSS ΔBVDSS ΔTJ IDSS Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current TA = 25°C unless otherwise noted Symbol Parameter Test Conditions MinTyp Max Units 20 V 28 mV/°C 1 10 ±100 μA nA ID = 250 μA VGS = 0 V, ID = 250 μA, Referenced to 25°C VDS = 20 V, VGS = 0 V VDS = 20 V, VGS = 0 V, TJ = 55°C VGS = ±20 V, VDS = 0 V IGSS Gate–Source Leakage On Characteristics VGS(th) ΔVGS(th) ΔTJ rDS(on) (Note 2) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance On–State Drain Current VDS = VGS, ID = 250 μA ID = 250 μA, Referenced to 25°C VGS = 10 V, ID = 7.5 A VGS = 4.5 V, ID = 6.5 A VGS = 10 V, ID = 7.5 A,TJ = 125°C VGS = 10 V, VDS = 5 V ID = 7.5 A 1 1.8 3 V –4.7 mV/°C 10.6 13 13 17 14.5 20 20 36 mΩ A S ID(on) gFS Forward Transconductance VDS = 5 V, Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VGS = 15 mV, f = 1.0 MHz RG Gate Resistance VDS = 15 V, V GS = 0 V, f = 1.0 MHz 1130 pF 300 pF 100 pF 2.4 Ω Switching Characteristics tr td(off) Qg(TOT) Qg Turn–On Rise Time Turn–Off Delay Time (Note 2) td(on) Turn–On Delay Time VDD = 15 V, VGS = 10 V, ID = 1 A, RGEN = 6 Ω 9 18 ns 5 10 ns 26 42 ns 7 14 ns 17 9 24 13 nC nC tf Turn–Off Fall Time Total Gate Charge at Vgs=10V Total Gate Charge at Vgs=5V VDD = 15 V, ID = 7.5 A, Qgs Gate–Source Charge Qgd Gate–Drain Charge 3.1 nC 2.7 nC FDS6911 Rev A(W) www.fairchildsemi.com
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FDS6911Dual N-Channel Logic level PowerTrench®MOSFET Electrical Characteristics TA = 25°C unless otherwise noted Symbol Parameter IS Test Conditions Min Typ Max Units 1.3 A Drain–Source Diode Characteristics and Maximum Ratings Maximum Continuous Drain–Source Diode Forward Current VSD Drain–Source Diode Forward VGS = 0 V, IS = 1.3 A (Note 2) 1.2 V Voltage IF = 7.5 A, diF/dt = 100 A/µs trr Diode Reverse Recovery Time 24 nS Qrr Diode Reverse Recovery Charge 13 nC Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 78°C/W when mounted on a 0.5 in2 pad of 2 oz copper b) 125°C/W when mounted on a .02 in2 pad of 2 oz copper c) 135°C/W when mounted on a minimum pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300μs, Duty Cycle < 2.0% FDS6911 Rev A(W) www.fairchildsemi.com
元器件交易网www.cecb2b.com FDS6911Dual N-Channel Logic level PowerTrench®MOSFET Typical Characteristics 202.6rDS(on), NORMALIZEDDRAIN-SOURCE ON-RESISTANCEVGS = 10.0V3.5VVGS = 3.0V16ID, DRAIN CURRENT (A)2.24.5V124.0V3.0V1.83.5V81.44.04.5V5.0416.0V10.0V000.250.50.751VDS, DRAIN-SOURCE VOLTAGE (V)1.251.50.604 812ID, DRAIN CURRENT (A)1620 Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.041.6rDS(on), NORMALIZED DRAIN-SOURCE ON-RESISTANCEID = 7.5AVGS = 10V1.4ID = 3.8ArDS(on), ON-RESISTANCE (OHM)0.031.2TA = 125C0.02o10.80.01TA = 25Co0.6-500-250255075100oTJ, JUNCTION TEMPERATURE (C)1251502 468VGS, GATE TO SOURCE VOLTAGE (V)10 Figure 3. On-Resistance Variation with Temperature. 20Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100IS, REVERSE DRAIN CURRENT (A)VDS = 5V16ID, DRAIN CURRENT (A)VGS = 0V1010.10.010.001TA = 125Co12TA = 125C8o25C-55C4oo25oCo-55C01.522.533.5VGS, GATE TO SOURCE VOLTAGE (V)40.00010 0.20.40.60.81VSD, BODY DIODE FORWARD VOLTAGE (V)1.2 Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
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FDS6911 Rev A(W)
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FDS6911Dual N-Channel Logic level PowerTrench®MOSFET Typical Characteristics 10VGS, GATE-SOURCE VOLTAGE (V)ID = 7.5A815V620V4CAPACITANCE (pF)VDS = 10V100080060014001200f = 1MHzVGS = 0 VCissCoss4002002Crss004812Qg, GATE CHARGE (nC)162000510152025VDS, DRAIN TO SOURCE VOLTAGE (V)30 Figure 7. Gate Charge Characteristics. 100RDS(ON) LIMIT100μs1ms10ms100ms1s10sDCP(pk), PEAK TRANSIENT POWER (W)50Figure 8. Capacitance Characteristics. 40ID, DRAIN CURRENT (A)10SINGLE PULSERθJA = 135°C/WTA = 25°C301200.1VGS = 10VSINGLE PULSEoRθJA = 135C/WTA = 25Co100.010.1110VDS, DRAIN-SOURCE VOLTAGE (V)10000.0010.010.1 1t1, TIME (sec)101001000 Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE1D = 0.50.20.10.10.050.020.01RθJA(t) = r(t) * RθJARθJA = 135°C/WP(pk)t1t2TJ - TA = P * RθJA(t)Duty Cycle, D = t1 / t20.01SINGLE PULSE0.0010.00010.0010.010.1t1, TIME (sec)1101001000Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. FDS6911 Rev A(W) www.fairchildsemi.com
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This datasheet contains the design specifications forproduct development. Specifications may change inany manner without notice.
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Rev. I18
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